A 30Gb/s 0.8pJ/b 14nm FinFET receiver data-pathPier Andrea FranceseMatthias Braendliet al.2016ISSCC 2016
A 3.6pJ/b 56Gb/s 4-PAM receiver with 6-Bit TI-SAR ADC and quarter-rate speculative 2-tap DFE in 32 nm CMOSHazar YuekselLukas Kullet al.2015ESSCIRC 2015
A 5.9mW/Gb/s 7Gb/s/pin 8-lane single-ended RX with crosstalk cancellation scheme using a XCTLE and 56-tap XDFE in 32nm SOI CMOSAlessandro CevreroCosimo Aprileet al.2015VLSI Circuits 2015
A 110 mW 6 bit 36 GS/s interleaved SAR ADC for 100 GBE occupying 0.048 mm2 in 32 nm SOI CMOSLukas KullJ. Plivaet al.2014A-SSCC 2014
A 16 Gb/s 3.7 mW/Gb/s 8-tap DFE receiver and baud-rate CDR with 31 kppm tracking bandwidthPier Andrea FranceseThomas Toiflet al.2014IEEE JSSC
A DDR3/4 memory link TX supporting 24-40 ω, 0.8-1.6 V, 0.8-5.0 Gb/s with slew rate control and thin oxide output stages in 22-nm CMOS SOIMarcel KosselChristian Menolfiet al.2014ESSCIRC 2014
A 16 Gb/s receiver with DC wander compensated rail-to-rail AC coupling and passive linear-equalizer in 22 nm CMOSPier Andrea FranceseThomas Toiflet al.2014ESSCIRC 2014
A 3.5pJ/bit 8-tap-feed-forward 8-tap-decision feedback digital equalizer for 16Gb/s I/OsThomas ToiflPeter Buchmannet al.2014ESSCIRC 2014
Wide bandwidth room-temperature THz imaging array based on antenna-coupled MOSFET bolometerThomas MorfBernhard Kleinet al.2014Sensors and Actuators, A: Physical
A deep trench capacitor based 2:1 and 3:2 reconfigurable on-chip switched capacitor DC-DC converter in 32 nm SOI CMOSToke M. AndersenFlorian Krismeret al.2014APEC 2014
High-Speed I/O LinksDesigning the next generation High-Speed I/O Links targeting low power consumption, low latency and small silicon area.