Matthias Brändli

Publications

• Design of synchronous frequency dividers in 5-nm FinFET CMOS technology

  • • Marcel Kossel
    • Pier Andrea Francese
    • et al.
  • 2023
  • Electronics Letters

• Design of Time-Encoded Spiking Neural Networks in 7-nm CMOS Technology

  • • Sandro Widmer
    • Marcel Kossel
    • et al.
  • 2023
  • IEEE TCAS-II

• A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference

  • • Manuel Le Gallo
    • Riduan Khaddam-Aljameh
    • et al.
  • 2023
  • Nature Electronics

• A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links

  • • Timothy O. Dickson
    • Zeynep Toprak Deniz
    • et al.
  • 2023
  • IEEE JSSC

• An 8b 1.0-to-1.25GS/s 0.7-to-0.8V Single-Stage Time-Based Gated-Ring-Oscillator ADC with 2× Interpolating Sense-Amplifier-Latches

  • • Abdullah Serdar Yonar
    • Pier Andrea Francese
    • et al.
  • 2023
  • ISSCC 2023

• An 8b 1.0-to-1.25 GS/s Time-Based ADC With Bipolar VTC and Sense Amplifier Latch Interpolated Gated Ring Oscillator TDC

  • • A. Serdar Yonar
    • Pier Andrea Francese
    • et al.
  • 2023
  • IEEE SSC-L

• A cryogenic SRAM based arbitrary waveform generator in 14 nm for spin qubit control

  • • Mridula Prathapan
    • Peter Mueller
    • et al.
  • 2022
  • ESSCIRC 2022

• A 72GS/s, 8-bit DAC-based Wireline Transmitter in 4nm FinFET CMOS for 200+Gb/s Serial Links

  • • Timothy Dickson
    • Zeynep Deniz
    • et al.
  • 2022
  • VLSI Technology and Circuits 2022

• An 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped Sampler and Class-AB Buffer in 4nm CMOS

  • • A. Serdar Yonar
    • Pier Andrea Francese
    • et al.
  • 2022
  • VLSI Technology and Circuits 2022

• A system design approach toward integrated cryogenic quantum control systems

  • • Mridula Prathapan
    • Peter Mueller
    • et al.
  • 2022
  • WOLTE 2022