Process optimizations for NBTI/PBTI for future replacement metal gate technologies
- Barry P. Linder
- A. Dasgupta
- et al.
- 2016
- IRPS 2016
Publications
198 results for Vijay Narayanan
Replacement high-K/metal-gate High-Ge-content strained SiGe FinFETs with high hole mobility and excellent SS and reliability at aggressive EOT ∼7Å and scaled dimensions down to sub-4nm fin widths
- Pouya Hashemi
- Takashi Ando
- et al.
- 2016
- VLSI Technology 2016
Demonstration of record SiGe transconductance and short-channel current drive in High-Ge-Content SiGe PMOS FinFETs with improved junction and scaled EOT
- Pouya Hashemi
- Kam-Leung Lee
- et al.
- 2016
- VLSI Technology 2016
FINFET technology featuring high mobility SiGe channel for 10nm and beyond
- Dechao Guo
- G. Karve
- et al.
- 2016
- VLSI Technology 2016
CMOS compatible high performance IIIV devices: Opportunities and challenges
- Yanning Sun
- Kuen-Ting Shiu
- et al.
- 2016
- ECS Meeting 2016
Challenges of 10 nm and 7 nm CMOS for server and mobile applications
- Rama Divakaruni
- Vijay Narayanan
- 2016
- ECS Meeting 2016
High-mobility high-Ge-content Si1-xGex-OI PMOS FinFETs with fins formed using 3D germanium condensation with Ge fraction up to x∼ 0.7, scaled EOT∼8.5Å and ∼10nm fin width
- Pouya Hashemi
- Takashi Ando
- et al.
- 2015
- VLSI Circuits 2015
High-mobility High-Ge-Content Si1-xGex-OI PMOS FinFETs with fins formed using 3D germanium condensation with Ge fraction up to x∼ 0.7, scaled EOT∼8.5Å and ∼10nm fin width
- Pouya Hashemi
- Takashi Ando
- et al.
- 2015
- VLSI Technology 2015
Evolution of interfacial Fermi level in In0.53Ga0.47As/high-κ/TiN gate stacks
- Adra Carr
- John Rozen
- et al.
- 2015
- Applied Physics Letters
An Analytical Metal Resistance Model and Its Application for Sub-22-nm Metal-Gate CMOS
- X. Miao
- Ruqiang Bao
- et al.
- 2015
- IEEE Electron Device Letters