Dechao Guo

Dr. Dechao Guo is Vice President of Advanced Logic Technology R&D in IBM Research. He supervises Advanced Logic Technology Research and Development from multiple labs in IBM Research including Yorktown Heights, NY, Albany, NY, and Burlington, VT. He leads teams of scientists and engineers across technology definition, technology development, technology qualification, design-technology co-optimization, and technology enablement. He is responsible for logic technology roadmap, for both high-performance and low-power applications in high-performance systems, AI compute and hybrid cloud.

Over last 20 years, across technology definition, development and qualification, Dechao has played important technical and leadership roles in generations of technologies, including high-k metal gate, SiGe channel, FinFET, Nanosheet, Nanostack Transistors, subtractive Ru integration, etc. He is also experienced in business partnership development and delivering value to partners and clients. Currently, Dechao is leading 2nm Nanosheet Joint Development between IBM and Rapidus, IBM's Nanostack Technology R&D, and logic technology interlock with IBM infrastructure to support IBM mainframe server product roadmap.

Dechao joined IBM Thomas J. Watson Research Center as Research Staff Member in 2007. He holds more than 200 US patents, has contributed to more than 100 papers in technical journals and conferences. He was named IBM Master Inventor in 2012. He has given numerous keynote and invited talks at prestigious nanotechnology and CMOS conferences, including SPIE, VLSI-TSA, SEMICON Korea, and SEMICON China. In addition, Dechao has served as committee member for semiconductor technology conferences such as IEEE IEDM.

Dechao received his Ph.D. in Electrical Engineering from Yale University, and B.S. degree from Peking University in Microelectronics, and completed IBM MicroMBA program. Dechao's passions are semiconductor technology advancement and growing talents for tomorrow's semiconductor world.