First demonstration of high-Ge-content strained-Si_1-xGe_x (x=0.5) on insulator PMOS FinFETs with high hole mobility and aggressively scaled fin dimensions and gate lengths for high-performance applications

Abstract

For the first time, we report fabrication and characterization of high-performance s-Si1-xGex-OI (x∼0.5) pMOS FinFETs with aggressively scaled dimensions. We demonstrate realization of s-SiGe fins with WFIN =3.3nm and devices with LG=16nm, in a CMOS compatible process. Using a Si-cap-free passivation, we report SS=68mV/dec and μeff=390±12 cm2/Vs at Ninv=1013cm-2, outperforming the state-of-the-art relaxed Ge FinFETs. We also report the highest performance reported to date among sub-20nm-LG pMOS FinFETs at VDD=0.5V. In addition, hole transport as well as electrostatics, performance and leakage characteristics of SGOI FinFETs for various dimensions are comprehensively studied in this work.