High Ge content SiGe FETs have recently drawn significant attention as a candidate for p-MOSFETs due to their enhanced transport and reliability properties and compatibility with bulk or SOI substrates. In addition, compared to strained pure germanium, they can offer reduced off-state tunneling leakage due to their relatively larger bandgap. Utilization of high Ge content SiGe in a FinFET architecture by direct epitaxial growth is quite challenging due to epitaxial critical thickness constraints, resulting in high levels of defectivity which may be detrimental to the device functionality and performance. In this paper, we review our recent progress on high Ge content SiGe FinFETs with Ge content over 60%. In particular, gate stack, passivation and equivalent oxide thickness scaling are major factors in achieving high quality devices based on high Ge content SiGe. We present our results based on a Si-cap-free FinFET surface passivation to achieve excellent sub-threshold swings for both gate first and replacement high-K and metal gate integration flows. In addition, various device aspects such as transport and mobility, S/D and junction, off-state drain leakage current and short channel performance are discussed.