A Materials Screening Methodology for Scaled Non-Volatile Memory in the AI Era
- Nicholas A. Lanzillo
- R. R. Robison
- 2019
- ANTS 2019
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62 results for Nick Lanzillo
Technology challenges and enablers to extend Cu metallization to beyond 7 nm node
- Takeshi Nogami
- H. Huang
- et al.
- 2019
- VLSI Technology 2019
Impact of Line and Via Resistance on Device Performance at the 5nm Gate All Around Node and beyond
- Nicholas A. Lanzillo
- Koichi Motoyama
- et al.
- 2018
- IITC 2018
Modified ALD TaN Barrier with Ru Liner and Dynamic Cu Reflow for 36nm Pitch Interconnect Integration
- P. Bhosale
- J. Maniscalco
- et al.
- 2018
- IITC 2018
Validity and Application of the TCR Method to MOL contactS
- E. Milosevic
- Vimal Kamineni
- et al.
- 2018
- IITC 2018
Impact of Liner Metals on Copper Resistivity at beyond 7nm Dimensions
- H. Huang
- Nicholas A. Lanzillo
- et al.
- 2018
- IITC 2018
Process Challenges in Fully Aligned Via Integration for sub 32 nm Pitch BEOL
- Benjamin D. Briggs
- C.B. Pcethala
- et al.
- 2018
- IITC 2018
Comparison of key fine-line BEOL metallization schemes for beyond 7 nm node
- Takeshi Nogami
- X. Zhang
- et al.
- 2017
- VLSI Technology 2017
Unconventional resistivity scaling in topological semimetal CoSi
- Shang-Wei Lien
- Ion Garate
- et al.
- 2023
- npj Quantum Materials
Chip Power-Frequency Scaling in 10/7nm Node
- Phil Oldiges
- Reinaldo A. Vega
- et al.
- 2020
- IEEE Access