Technology viable DC performance elements for Si/SiGe channel CMOS FinFTT
- G. Tsutsui
- Ruqiang Bao
- et al.
- 2016
- IEDM 2016
Publications
63 results for Dechao Guo
CMP Challenges for Advanced Technology Nodes
- John H Zhang
- Haigou Huang
- et al.
- 2017
- MRS Advances
FINFET technology featuring high mobility SiGe channel for 10nm and beyond
- Dechao Guo
- G. Karve
- et al.
- 2016
- VLSI Technology 2016
Understanding short channel mobility degradation by accurate external resistance decomposition and intrinsic mobility extraction
- Tao Chu
- Reinaldo A. Vega
- et al.
- 2015
- Journal of Applied Physics
Dielectric isolated FinFETs on bulk substrate
- Darsen Lu
- Kangguo Cheng
- et al.
- 2014
- S3S 2014
SOI FinFET versus bulk FinFET for 10nm and below
- Terence B. Hook
- F. Allibert
- et al.
- 2014
- S3S 2014
10nm FINFET technology for low power and high performance applications
- D. Guo
- H. Shang
- et al.
- 2014
- ICSICT 2014
Investigation of fixed oxide charge and fin profile effects on bulk FinFET device characteristics
- Bomsoo Kim
- Dong-Il Bae
- et al.
- 2013
- IEEE Electron Device Letters
Aggressively scaled strained silicon directly on insulator (SSDOI) FinFETs
- A. Khakifirooz
- R. Sreenivasan
- et al.
- 2013
- S3S 2013
22nm High-performance SOI technology featuring dual-embedded stressors, Epi-Plate High-K deep-trench embedded DRAM and self-aligned Via 15LM BEOL
- S. Narasimha
- P. Chang
- et al.
- 2012
- IEDM 2012