A comparative study of strain and Ge content in Si1-xGex channel using planar FETs, FinFETs, and strained relaxed buffer layer FinFETs
- Choonghyun Lee
- Shogo Mochizuki
- et al.
- 2017
- IEDM 2017
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198 results for Vijay Narayanan
High performance and reliable strained SiGe PMOS FinFETs enabled by advanced gate stack engineering
- Pouya Hashemi
- Takashi Ando
- et al.
- 2017
- IEDM 2017
Electron mobility in thin In0.53Ga0.47As channel
- Eduard Cartier
- Amlan Majumdar
- et al.
- 2017
- ESSDERC 2017
High performance and record subthreshold swing demonstration in scaled RMG SiGe FinFETs with high-Ge-content channels formed by 3D condensation and a novel gate stack process
- Pouya Hashemi
- Takashi Ando
- et al.
- 2017
- VLSI Technology 2017
High performance and low leakage current InGaAs-on-silicon FinFETs with 20 nm gate length
- Xiao Sun
- Christopher P. D’Emic
- et al.
- 2017
- VLSI Technology 2017
Interface engineering of Si1-xGex gate stacks for high performance dual channel CMOS
- Choonghyun Lee
- Richard G. Southwick
- et al.
- 2017
- ASICON 2017
High performance PMOS with strained high-Ge-content SiGe fins for advanced logic applications
- Pouya Hashemi
- Takashi Ando
- et al.
- 2017
- VLSI-TSA 2017
High Mobility High-Ge-Content SiGe PMOSFETs Using Al2O3/HfO2 Stacks with In-Situ O3 Treatment
- Takashi Ando
- Pouya Hashemi
- et al.
- 2017
- IEEE Electron Device Letters
CMOS compatible MIM decoupling capacitor with reliable sub-nm EOT high-k stacks for the 7 nm node and beyond
- Takashi Ando
- Eduard Cartier
- et al.
- 2016
- IEDM 2016
Technology viable DC performance elements for Si/SiGe channel CMOS FinFTT
- G. Tsutsui
- Ruqiang Bao
- et al.
- 2016
- IEDM 2016