A 100-mW 4 × 10 Gb/s transceiver in 80-nm CMOS for high-density optical interconnects
- Christian Kromer
- Gion Sialm
- et al.
- 2005
- IEEE Journal of Solid-State Circuits
Thomas Morf
Title
Senior Research Scientist
Bio
Thomas Morf was born in 1961, in Zurich, Switzerland. He received his B.S. from the Zurich University of Applied Science, Switzerland, in 1987, and his Master of Science in Electrical and Computer Engineering from the University of California at Santa Barbara (UCSB) in 1991.
From 1989 to 1991, he worked as a research assistant at UCSB, performing research in the field of active microwave inductors and digital GaAs circuits. In 1991, he joined the Swiss Federal Institute of Technology (ETH) in Zurich, Switzerland, from where he received his Ph.D. in 1996. His Ph.D. work investigated circuit design and processing for high-speed optical links on GaAs using epitaxial lift-off techniques.
In 1996, he transferred to the Electronics Laboratory of the ETH, where he led a research group in the area of InP-HBT circuit design and technology. In 1999, he joined IBM Research – Zurich in Rueschlikon, Switzerland.
His current research interests include: ESD circuit protection, electrical and optical high-speed high-density interconnects, on chip coil modelling and cryogenic electronics for quantum computing. Dr. Morf has co-authored more than 190 papers and is co-inventor of more than 45 issued patents.
Publications
A 0.94-ps-RMS-Jitter 0.016-mm 2 2.5-GHz Multiphase Generator PLL with 360° Digitally Programmable Phase Shift for 10-Gb/s Serial Links
- Thomas Toifl
- Christian Menolfi
- et al.
- 2005
- IEEE Journal of Solid-State Circuits
Tradeoffs of vertical-cavity surface emitting lasers modeling for the development of driver circuits in short distance optical links
- Gion Sialm
- Daniel Erni
- et al.
- 2005
- Opt. Eng.
40 Gbit/s limiting output buffer in 80 nm CMOS
- G. Sialm
- C. Kromer
- et al.
- 2005
- Electronics Letters
Low-jitter 10 GHz multiphase PLL in 90 nm CMOS
- M. Kossel
- P. Buchmann
- et al.
- 2005
- Electronics Letters
Comparison of simulation and measurement of dynamic fiber-coupling effects for high-speed multimode VCSELs
- Gion Sialm
- Daniel Lenz
- et al.
- 2005
- Journal of Lightwave Technology
Optical interconnect demonstrator with embedded waveguides and butt-coupled optoelectronic modules
- C. Berger
- R. Beyeler
- et al.
- 2005
- IP 2005
Low-power-consuming 24-Gb/s multiplexer in 90-nm CMOS for optical transceivers
- Lucio Carlo Rodoni
- Thomas Morf
- et al.
- 2004
- EDMO 2004
60 GHz VCO with wideband tuning range fabricated on VLSI SOI CMOS technology
- Frank Ellinger
- Thomas Morf
- et al.
- 2004
- IMS 2004
A multiphase PLL for 10 Gb/s links in SOI CMOS technology
- Marcel Kossel
- Thomas Morf
- et al.
- 2004
- RFIC 2004
Patents
- US
- 12191382
- US
- 12095473
- DE
- 11 2019 000 181
- TW
- I850965
- US
- 12039403
- GB
- 2620314
- CN
- ZL201980010119.8
- US
- 11916568
- US
- 11816062
- US
- 11811418
Projects
Designing the next generation High-Speed I/O Links targeting low power consumption, low latency and small silicon area.
Top collaborators
MB
Matthias Brändli
Digital Circuit Design
PF
Pier Andrea Francese
Principal RSM - Analog Circuit Design
MK
Marcel Kossel
Circuit Designer
CZ
Cezar Zota
Staff Research Scientist, Master inventor