Dynamic Alert Suppression Policy for Noise Reduction in AIOps
- Karan Bhukar
- Harshit Kumar
- et al.
- 2024
- ICSE 2024
Publications
Empirical overhead of the adapted surface code on defective qubit arrays
- Sophia Lin
- Joshua Viszlai
- et al.
- 2023
- APS March Meeting 2023
Data Motion Acceleration: Chaining Cross-Domain Multi Accelerators
- Shu-Ting Wang
- Hanyang Xu
- et al.
- 2024
- HPCA 2024
Enterprise-Class Cache Compression Design
- Alper Buyuktosunoglu
- David Trilla Rodriguez
- et al.
- 2024
- HPCA 2024
EUV patterned gate variation reduction in next generation transistor architectures
- Gopal Kenath
- Martin Burkhardt
- et al.
- 2024
- SPIE Advanced Lithography + Patterning 2024
Novel ellipsometry-based machine learning technique for characterization of low sensitivity critical dimensions within gate-all-around transistors
- Houssam Chouaib
- Valeria Dimastrodonato
- et al.
- 2024
- SPIE Advanced Lithography + Patterning 2024
From Lab to Fab - In-line SIMS for Process Control in Nanosheet Gate-All-Around Device Manufacturing
- Stefan Schoeche
- Katherine Sieg
- et al.
- 2024
- SPIE Advanced Lithography + Patterning 2024
Large Feature Wafer Level In-Line Optical Metrology Techniques for Advanced Packaging Schemes
- Katherine Sieg
- Chris Bottoms
- et al.
- 2024
- SPIE Advanced Lithography + Patterning 2024
Spectral Interferometry for TSV Metrology in Chiplet Technology
- Stefan Schoeche
- Daniel Schmidt
- et al.
- 2024
- SPIE Advanced Lithography + Patterning 2024
11.4 IBM NorthPole: An Architecture for Neural Network Inference with a 12nm Chip
- 2024
- ISSCC 2024