John Arthur

Overview

Title

Manager - Brain-Inspired Hardware

Location

IBM Research - Almaden Almaden, CA USA

Bio

I joined IBM in 2010 to work on the DARPA-funded SyNAPSE Project. I am currently a principal research scientist and hardware manager in the Brain-Inspired Computing Group at IBM Almaden Research Center. Previously, I did postdoctoral and graduate work in bioengineering at Stanford University and University of Pennsylvania, respectively.

We published a paper in Science (2014) on our chip, TrueNorth, with 1 million neurons and 256 million synapses.

http://www.sciencemag.org/content/345/6197/668.full

We published a paper in PNAS (2016) on our algorithm, Eedn, for learning deep neural networks for TrueNorth.

http://www.pnas.org/content/113/41/11441.full

We published a paper in IEEE Computer (2019) summarizing the TrueNorth project from inception to presentation of our recent 64-Million-Neuron System.

https://ieeexplore.ieee.org/document/8713821

www.johnarthur.org

Publications

Discovering Low-Precision Networks Close to Full-Precision Networks for Efficient Inference
- - Jeffrey L. McKinstry
  - Steven K. Esser
  - et al.
- 2019
- EMC2-NIPS 2019
Always-On Speech Recognition Using TrueNorth, a Reconfigurable, Neurosynaptic Processor
- - Wei-Yu Tsai
  - Davis R. Barch
  - et al.
- 2017
- IEEE TC
Convolutional networks for fast, energy-efficient neuromorphic computing
- - Steven K. Esser
  - Paul Merolla
  - et al.
- 2016
- PNAS
Mapping Generative Models onto a Network of Digital Spiking Neurons
- - Bruno U. Pedroni
  - Srinjoy Das
  - et al.
- 2016
- IEEE TBioCAS
Real-time sensory information processing using the TrueNorth Neurosynaptic System
- - Andreas G. Andreou
  - Andrew A. Dykman
  - et al.
- 2016
- ISCAS 2016
TrueNorth Ecosystem for Brain-Inspired Computing: Scalable Systems, Software, and Applications
- - Jun Sawada
  - Filipp Akopyan
  - et al.
- 2016
- SC 2016
Backpropagation for energy-efficient neuromorphic computing
- - Steven K. Esser
  - Rathinakumar Appuswamy
  - et al.
- 2015
- NeurIPS 2015
TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip
- - Filipp Akopyan
  - Jun Sawada
  - et al.
- 2015
- IEEE TCADIS
Gibbs sampling with low-power spiking digital neurons
- - Srinjoy Das
  - Bruno U. Pedroni
  - et al.
- 2015
- ISCAS 2015
Visual saliency on networks of neurosynaptic cores
- - Alexander Andreopoulos
  - Brian Taba
  - et al.
- 2015
- IBM J. Res. Dev

Visit Google Scholar

Patents

Memory-mapped Interface For Message Passing Computing System
- 19 Mar 2023
- JP
- 7248667
Runtime Reconfigurable Neural Network Processor Core
- 08 Mar 2023
- JP
- 7241771
Neuromorphic Event-driven Neural Computing Architecture In A Scalable Neural Network
- 13 Feb 2023
- US
- 11580366
Parallel Computational Architecture With Reconfigurable Core-level And Vector-level Parallelism
- 12 Feb 2023
- JP
- 7227272
Time, Space, And Energy Efficient Neural Inference Via Parallelism And On-chip Memory
- 31 Jan 2023
- JP
- 7220007
Flexible Precision Neural Inference Processing Unit
- 26 Dec 2022
- US
- 11537859
Neural Network Weight Distribution From A Grid Of Memory Elements
- 05 Dec 2022
- US
- 11521085
Memory-mapped Interface For Message Passing Computing System
- 15 Nov 2022
- GB
- 2581904
Runtime Reconfigurable Neural Network Processor Core
- 14 Nov 2022
- US
- 11501140
Massively Parallel Neural Inference Computing Elements
- 10 Nov 2022
- JP
- 7175548

Top collaborators

John Arthur

Overview

Title

Location

Bio

Publications

Discovering Low-Precision Networks Close to Full-Precision Networks for Efficient Inference

Always-On Speech Recognition Using TrueNorth, a Reconfigurable, Neurosynaptic Processor

Convolutional networks for fast, energy-efficient neuromorphic computing

Mapping Generative Models onto a Network of Digital Spiking Neurons

Real-time sensory information processing using the TrueNorth Neurosynaptic System

TrueNorth Ecosystem for Brain-Inspired Computing: Scalable Systems, Software, and Applications

Backpropagation for energy-efficient neuromorphic computing

TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip

Gibbs sampling with low-power spiking digital neurons

Visual saliency on networks of neurosynaptic cores

Patents

Memory-mapped Interface For Message Passing Computing System

Runtime Reconfigurable Neural Network Processor Core

Neuromorphic Event-driven Neural Computing Architecture In A Scalable Neural Network

Parallel Computational Architecture With Reconfigurable Core-level And Vector-level Parallelism

Time, Space, And Energy Efficient Neural Inference Via Parallelism And On-chip Memory

Flexible Precision Neural Inference Processing Unit

Neural Network Weight Distribution From A Grid Of Memory Elements

Memory-mapped Interface For Message Passing Computing System

Runtime Reconfigurable Neural Network Processor Core

Massively Parallel Neural Inference Computing Elements

Top collaborators

Dharmendra Modha

Filipp Akopyan

Guillaume Garreau