Supply and threshold voltage optimization for low power design
- D.J. Frank
- P. Solomon
- et al.
- 1997
- LPED 1997
Publications
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107 results for David J. Frank
A 12.8 mW/ channel cryogenic RF-AWG in 14nm FinFET for transmon qubit control
- S. Chakraborty
- K. Tien
- et al.
- 2024
- ESSERC 2024
Characterization of 14nm CMOS Technology At Cryogenic Temperatures Using Dense Addressable Arrays
- R. Robertazzi
- D.J. Frank
- et al.
- 2024
- VTS 2024
Synthesis design strategies for energy-efficient microprocessors
- Ching Zhou
- Yu-Shiang Lin
- et al.
- 2016
- ICCD 2016
Devices and circuits at the end of scaling
- David J. Frank
- 2016
- SNW 2016
Voltage and temperature dependence of random telegraph noise in highly scaled HKMG ETSOI nFETs and its impact on logic delay uncertainty
- H. Miki
- M. Yamaoka
- et al.
- 2012
- VLSI Technology 2012
Compact model and performance estimation for tunneling nanowire FET
- Paul Solomon
- David J. Frank
- et al.
- 2011
- DRC 2011
A fully anlytical model for carbon nanotube FETs including quantum capacitances and electrostatics
- Lan Wei
- David J. Frank
- et al.
- 2011
- NSTI-Nanotech 2011
Understanding short-term BTI behavior through comprehensive observation of gate-voltage dependence of RTN in highly scaled high-κ / metal-gate pFETs
- Hiroshi Miki
- M. Yamaoka
- et al.
- 2011
- VLSI Technology 2011
Impact of HK / MG stacks and future device scaling on RTN
- Naoki Tega
- Hiroshi Miki
- et al.
- 2011
- IRPS 2011