Publications

76 results for Huiming Bu

Vertical-Transport Nanosheet Technology for CMOS Scaling beyond Lateral-Transport Devices
- - H. Jagannathan
  - B. Anderson
  - et al.
- 2021
- IEDM 2021
Critical Elements for Next Generation High Performance Computing Nanosheet Technology
- - R. Bao
  - C. Durfee
  - et al.
- 2021
- IEDM 2021
Gate-Last IO Transistors based on Stacked Gate-All-Around Nanosheet Architecture for Advanced Logic Technologies
- - M. Bhuiyan
  - M. Kim
  - et al.
- 2021
- IEDM 2021
Highly Selective SiGe Dry Etch Process for the Enablement of Stacked Nanosheet Gate-All-Around Transistors
- - Curtis Durfee
  - Subhadeep Kal
  - et al.
- 2021
- ECS Meeting 2021
Challenges and Opportunities for Stacked Transistor: DTCO and Device
- - J. Wang
  - S.D. Suk
  - et al.
- 2021
- VLSI Technology 2021
Stacked Gate-All-Around Nanosheet pFET with Highly Compressive Strained Si1-xGex Channel
- - Shogo Mochizuki
  - M. Bhuiyan
  - et al.
- 2020
- IEDM 2020
Parasitic Resistance Reduction for Aggressively Scaled Stacked Nanosheet Transistors
- - Su-Chen Fan
  - Ruilong Xie
  - et al.
- 2020
- IITC 2020
Selective Enablement of Dual Dipoles for near Bandedge Multi-Vt Solution in High Performance FinFET and Nanosheet Technologies
- - Ruqiang Bao
  - K. Watanabe
  - et al.
- 2020
- VLSI Technology 2020
Full Bottom Dielectric Isolation to Enable Stacked Nanosheet Transistor for Low Power and High Performance Applications
- - J. Zhang
  - S. Pancharatnam
  - et al.
- 2019
- IEDM 2019
A Novel Dry Selective Etch of SiGe for the Enablement of High Performance Logic Stacked Gate-All-Around NanoSheet Devices
- - Nicolas Loubet
  - T. Devarajan
  - et al.
- 2019
- IEDM 2019