Publication
IEDM 2021
Conference paper

Gate-Last IO Transistors based on Stacked Gate-All-Around Nanosheet Architecture for Advanced Logic Technologies

Abstract

For the first time, we demonstrate gate-all-around nanosheet based I/O transistors with a gate-last fabrication flow compatible with logic transistors using two different gate oxides: deposited oxide (DO) and selective oxide (SO). The novel selective oxidation process enables thick gate oxide formation by expanding space between silicon sheets (Tsus). Advanced surface treatment techniques are used to enhance the drive current. Proper functioning of I/O devices at a starting Tsus of 12nm has been achieved for both NFETs and PFETs operation. The process flows presented in this paper result in I/O devices with excellent characteristics including low leakage, excellent PBTI, high breakdown voltage (Vbd) reaching >5.5V and a good range of Vbd/ maximum operation voltage (Vmax) tunability.

Date

13 Dec 2021

Publication

IEDM 2021

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