Publications

198 results for Vijay Narayanan

High performance FDSOI CMOS technology with metal gate and high-k
- - Bruce Doris
  - Y.-H. Kim
  - et al.
- 2005
- VLSI Technology 2005
Optimization of high κ gate stacks with poly-Si, FUSI and metal electrodes
- - R. Jammy
  - V. Narayanan
  - et al.
- 2005
- ISTC 2005
On the location and magnitude of trapped charge in poly- Si ALD-Al ₂O₃ capped Hf-silicate gate stacks
- - Kingsuk Maitra
  - Barry P. Linder
  - et al.
- 2005
- PRiME/ECS Meeting 2005
Ultra-thin SOI replacement gate CMOS with ALD TaN / high-k gate stack
- - B. Doris
  - B.P. Linder
  - et al.
- 2005
- VLSI-TSA 2005
Poly-Si/high-k gate stacks with near-ideal threshold voltage and mobility
- - M.M. Frank
  - V.K. Paruchuri
  - et al.
- 2005
- VLSI-TSA 2005
Potential imaging of Si/HfO₂/polycrystalline silicon gate stacks: Evidence for an oxide dipole
- - R. Ludeke
  - V. Narayanan
  - et al.
- 2005
- Applied Physics Letters
Evaluation of thermal stability for CMOS gate metal materials
- - C. Cabral Jr.
  - C. Lavoie
  - et al.
- 2004
- JES
Charge trapping in aggressively scaled metal gate/high-κ stacks
- - E. Gusev
  - V. Narayanan
  - et al.
- 2004
- IEDM 2004
Interface engineering for enhanced electron mobilities in W/HfO ₂ gate stacks
- - A.C. Callegari
  - P. Jamison
  - et al.
- 2004
- IEDM 2004
Advanced gate stacks with fully silicided (FUSI) gates and high-κ dielectrics: Enhanced performance at reduced gate leakage
- - E. Gusev
  - C. Cabral Jr.
  - et al.
- 2004
- IEDM 2004