Thermal performance evaluation of dual-side cooling for a three-dimensional (3D) chip stack: Additional cooling from the laminate (substrate) side
- Keiji Matsumoto
- Hiroyuki Mori
- et al.
- 2016
- ICEP 2016
Publications
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54 results for Hiroyuki Mori
Advanced interconnect technologies in the era of cognitive computing
- Yasumitsu Orii
- Akihiro Horibe
- et al.
- 2016
- Pan Pacific 2016
Vertical integration after stacking (ViaS) process for low-cost and low-stress 3D silicon integration
- Kuniaki Sueoka
- Akihiro Horibe
- et al.
- 2015
- 3DIC 2015
Warpage analysis of organic substrates for 2.1D packaging
- Sayuri Kohara
- Keishi Okamoto
- et al.
- 2015
- 3DIC 2015
Effects of low CTE materials on thermal deformation of organic substrates in flip chip package application
- Hiroyuki Mori
- Sayuri Kohara
- et al.
- 2015
- InterPACK 2015
Warpage modeling technique of organic interposer considering deformation by insulator material shrinkage
- Keishi Okamoto
- Sayuri Kohara
- et al.
- 2015
- ICEP-IAAC 2015
Cooling from the bottom side (laminate (substrate) side) of a three-dimensional (3D) chip stack
- Keiji Matsumoto
- Hiroyuki Mori
- et al.
- 2014
- 3DIC 2014
Pre-applied inter chip fill for 3D-IC joining
- Yasuhiro Kawase
- Makoto Ikemoto
- et al.
- 2014
- IMAPS 2014
IMS (injection molded solder) technology with liquid photoresist for ultra fine pitch bumping
- Toyohiro Aoki
- Kazushige Toriyama
- et al.
- 2014
- IMAPS 2014
High thermal conductivity underfill for the thermal management of three-dimensional (3D) chip stacks
- Keiji Matsumoto
- Hiroyuki Mori
- et al.
- 2014
- SEMI-THERM 2014