DRC 2010
Conference paper

Gate-all-around silicon nanowire MOSFETs and circuits

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We demonstrate undoped-body, gate-all-around (GAA) Si nanowire (NW) MOSFETs with excellent electrostatic scaling. These NW devices, with a TaN/Hf-based gate stack, have high drive-current performance with NFET/PFET IDSAT = 825/950 μA/μm (circumference-normalized) or 2592/2985 μA/μm (diameter-normalized) at supply voltage VDD = 1 V and off-current IOFF = 15 nμ/μm. Superior NW uniformity is obtained through the use of a combined hydrogen annealing and oxidation process. Clear scaling of short-channel effects versus NW size is observed. Additionally, we observe a divergence of the nanowire capacitance from the planar limit, as expected, as well as enhanced device self-heating for smaller diameter nanowires. We have also applied this method to making functional 25-stage ring oscillator circuits. © 2010 IEEE.