Chiplet and Packaging
Building new architectures for next-generation AI.
Overview
IBM offers chiplet and advanced packaging technology capabilities to supercharge innovations for AI and logic. By bringing multiple technologies together at the package level to increase performance and reduce cost, our frameworks provide a new paradigm for semiconductor innovations as well as a new pathway to meet AI’s increasing performance demands. Our recent breakthroughs in packaging R&D include the novel use of infrared laser debonding with silicon handler wafers, which offers new capabilities compared to the industry standard of glass carrier wafers. We’re also pioneering a new hybrid bonding approach that drastically reduces the I/O interconnection size needed between two chiplets, paving the way for new designs. Our packaging facility in Bromont, Canada manufactures 100,000 advanced flip chip modules each week. As the largest Outsourced Semiconductor Assembly and Test facility in North America, its mission is to transform semiconductor components into state-of-the-art microelectronic solutions.
Our work
- ExplainerMike Murphy
IBM Research unveils hybrid bonding for packaging chips
NewsMike MurphyThe path to 1 nanometer chips and beyond
ResearchMike MurphyThe future of computer chips is being built in Albany
Deep DiveMike MurphyThe breakthrough that could simplify the 3D chipmaking supply chain
NewsDale McHerron
Publications
Position: Agentic Systems Should be General
- Elron Bandel
- Asaf Yehudai
- et al.
- 2026
- ICML 2026
Conference paperAdvanced Acoustic Emission (AE) Sensing and Analytics Scheme for In-situ Warpage Characterizations of Flip-Chip Packaging
- Yigit Turan
- Xinchen Wang
- et al.
- 2026
- ECTC 2026
PosterFluxless TCB with Atmospheric Pressure Plasma Surface Treatment Enabling Ultra-Fine Pitch Solder Micro-Bumps for 3D Integration
- Mohammed Alhendi
- Luke Darling
- et al.
- 2026
- ECTC 2026
Short paperDirect Bridge Multi-die (DBrM) Package: A Novel Silicon Bridge Chiplet Packaging Technology Using Die-Edge Gluing Technique for Chip Reconstitution
- Akihiro Horibe
- Chinami Marushima
- et al.
- 2026
- ECTC 2026
Conference paperLithographic Process Optimization for Next-Generation Advanced Packaging Influenced by Wafer Topography and Reticle Stitching
- Chris Bottoms
- Sarah Nahar Chowdhury
- et al.
- 2026
- SPIE Advanced Lithography + Patterning 2026
Conference paperLithographic Innovations for Advanced Packaging: Enabling Scalable Integration Across Large Fields
- Alex Hubbard
- Christopher Carr
- et al.
- 2026
- SPIE Advanced Lithography + Patterning 2026
Conference paper