2X reduction of STT-MRAM switching current using double spin-torque magnetic tunnel junctionGuohan HuJonathan Sunet al.2021IEDM 2021
Development of spatial nearest-neighbor analysis and Clustering/Gibbs statistical methodology for filament percolation in dielectric breakdown and forming process in ReRAM devicesErnest Y WuFranco Stellariet al.2021IEDM 2021
Optimizing AsSeGe Chalcogenides by Dopants for Extremely Low IOFF, High Endurance and Low Vth Drift 3D Crosspoint MemoryHuai-Yu ChengWei-Chih Chienet al.2021IEDM 2021
Gate-Last IO Transistors based on Stacked Gate-All-Around Nanosheet Architecture for Advanced Logic TechnologiesM. BhuiyanM. Kimet al.2021IEDM 2021
Vertical-Transport Nanosheet Technology for CMOS Scaling beyond Lateral-Transport DevicesH. JagannathanB. Andersonet al.2021IEDM 2021
First Experimental Demonstration of MRAM Data Scrubbing: 80 Mb MRAM with 40 nm junctions for Last Level Cache ApplicationsH. WuV. Katragaddaet al.2021IEDM 2021
Critical Elements for Next Generation High Performance Computing Nanosheet TechnologyR. BaoC. Durfeeet al.2021IEDM 2021
Electromigration and Line R of Graphene Capped Cu Dual Damascene InterconnectT. NogamiS. Nguyenet al.2021IEDM 2021
VisDA-2021 Competition: Universal Domain Adaptation to Improve Performance on Out-of-Distribution DataDina BashkirovaDan Hendryckset al.2021NeurIPS 2021