Yield monitor for embedded-SiGe process optimization
- Xu Ouyang
- Shwu-Jen Jeng
- et al.
- 2008
- ICSICT 2008
Publications
20 results for Hasan M Nayfeh
(110) Channel, SiON gate-dielectric PMOS with record high Ion=1 mA/μm through channel stress and source drain external resistance (R ext) engineering
- B. Yang
- A. Waite
- et al.
- 2007
- IEDM 2007
Hole transport in nanoscale p-type MOSFET SOI devices with high strain
- H. Nayfeh
- S.-J. Jeng
- et al.
- 2007
- DRC 2007
High performance 45-nm SOI technology with enhanced strain, porous low-k BEOL, and immersion lithography
- S. Narasimha
- K. Onishi
- et al.
- 2006
- IEDM 2006
Effect of tensile uniaxial stress on the electron transport properties of deeply scaled FD-SOI n-type MOSFETs
- H. Nayfeh
- D. Singh
- et al.
- 2006
- IEEE Electron Device Letters
Effect of contact liner stress in high-performance FDSOI devices with ultra-thin silicon channels and 30 nm gate lengths
- D. Singh
- J. Hergenrother
- et al.
- 2005
- IEEE International SOI Conference 2005
High performance 65 nm SOI technology with enhanced transistor strain and advanced-low-K BEOL
- W.-H. Lee
- A. Waite
- et al.
- 2005
- IEDM 2005
Impact of ion implantation damage and thermal budget on mobility enhancement in strained-Si N-channel MOSFETs
- Guangrui Xia
- Hasan M. Nayfeh
- et al.
- 2004
- IEEE Transactions on Electron Devices
Advanced gate stacks with fully silicided (FUSI) gates and high-κ dielectrics: Enhanced performance at reduced gate leakage
- E. Gusev
- C. Cabral Jr.
- et al.
- 2004
- IEDM 2004
Investigation of Scaling Methodology for Strained Si n-MOSFETs Using a Calibrated Transport Model
- Hasan M. Nayfeh
- Judy L. Hoyt
- et al.
- 2003
- IEDM 2003