Publications

60 results for Hemanth Jagannathan

Sub-25nm FinFET with advanced fin formation and short channel effect engineering
- - Tenko Yamashita
  - Veeraraghvan S. Basker
  - et al.
- 2011
- VLSI Technology 2011
ETSOI CMOS for system-on-chip applications featuring 22nm gate length, sub-100nm gate pitch, and 0.08μm² SRAM cell
- - Kangguo Cheng
  - A. Khakifirooz
  - et al.
- 2011
- VLSI Circuits 2011
ETSOI CMOS for system-on-chip applications featuring 22nm gate length, sub-100nm gate pitch, and 0.08μm² SRAM cell
- - Kangguo Cheng
  - A. Khakifirooz
  - et al.
- 2011
- VLSI Technology 2011
Opportunities and challenges of FinFET as a device structure candidate for 14nm node CMOS technology
- - Tenko Yamashita
  - Veeraraghvan S. Basker
  - et al.
- 2011
- CSTIC 2011
Aggressively scaled strained-silicon-on-insulator undoped-body High-κ/Metal-Gate nFinFETs for high-performance logic applications
- - Kingsuk Maitra
  - Ali Khakifirooz
  - et al.
- 2011
- IEEE Electron Device Letters
Measurement of oxygen diffusion in nanometer scale HfO₂ gate dielectric films
- - Sufi Zafar
  - Hemanth Jagannathan
  - et al.
- 2011
- Applied Physics Letters
Hot-carrier degradation in undoped-body etsoi fets and soi finfets
- - Miaomiao Wang
  - Pranita Kulkarni
  - et al.
- 2010
- IRPS 2010
A 0.063 μm² FinFET SRAM cell demonstration with conventional lithography using a novel integration scheme with aggressively scaled fin and gate pitch
- - Veeraraghvan S. Basker
  - Theodorus E. Standaert
  - et al.
- 2010
- VLSI Technology 2010
Extraction of effective oxide thickness for SOI FINFETs with high-κ/Metal gates using the body effect
- - Sujata Paul
  - Frank Yeh
  - et al.
- 2010
- IEEE Electron Device Letters
Methodology of ALD HfO₂ high-κ gate dielectric optimization by cyclic depositions and anneals
- - H. Jagannathan
  - Robert D. Clark
  - et al.
- 2010
- ECS Transactions