L.K. Wang, A. Acovic, et al.
MRS Spring Meeting 1993
We report Ge p-channel MOSFETs with a thin gate stack of Ge oxynitride and LTO on bulk Ge substrate without a Si cap layer. Excellent device characteristics (IV and CV) are achieved with subthreshold slope 82mV/dec. ∼40% hole mobility enhancement is obtained over the Si control with a thermal SiO2 gate dielectric. To our knowledge, this is the first demonstration of Ge MOSFETs with less than 10nm thick gate dielectric and less than 100mV/dec subthreshold slope.