Danny Luu, Lukas Kull, et al.
VLSI Circuits 2017
This letter proposes an in-comparator aperture-time equalization scheme using the impulse response of a clocked comparator. The technique is applied in a wireline link receiver prototype, implemented in CMOS 7-nm FinFET technology. The proposed method controls the aperture properties of the slicers by shaping their impulse sensitivity functions. We demonstrate an aperture skew control range of 4.7 ps with 147-fs accuracy for NRZ signaling at 40 Gb/s. PAM4 signaling at 80 Gb/s is also showcased using the proposed technique. These results serve as a proof of concept for next-generation source-synchronous chip-to-chip dense I/O links where aperture-time skews could be fine adjusted inside each comparator.
Danny Luu, Lukas Kull, et al.
VLSI Circuits 2017
Thomas Toifl, Peter Buchmann, et al.
ESSCIRC 2014
Gain Kim, Lukas Kull, et al.
A-SSCC 2019
Marcel Kossel, Matthias Braendli, et al.
Electronics Letters