About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Publication
VLSI Circuits 2017
Conference paper
A 60 Gb/s 1.9 pJ/bit NRZ optical-receiver with low latency digital CDR in 14nm CMOS FinFET
Abstract
This work reports a low power implementation of a 60Gb/s NRZ optical receiver (RX) in 14nm bulk CMOS finFET featuring a first-order digital CDR with high jitter tolerance (JTOL). The design includes a single phase-rotator (PR) with low-complexity control logic suitable for high-speed applications. Multi-phase clock signals that drive data/edge slicers are created by an open loop quadrature clock generator. The circuit, characterized in an 850nm VCSEL based optical link, recovers PRBS7 data (BER<10-12) at 60Gb/s with a frequency tracking range of ±600ppm. The measured sinusoidal JTOL indicates a corner frequency of 80MHz, with high frequency JTOL of 0.16UIpp at-5dBm optical modulation amplitude (OMA). The RX energy efficiency is 1.9pJ/bit.