Challenges and solutions of FinFET integration in an SRAM cell and a logic circuit for 22 nm node and beyond
- H. Kawasaki
- V.S. Basker
- et al.
- 2009
- IEDM 2009
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75 results for Huiming Bu
Fully depleted extremely thin SOI technology fabricated by a novel integration scheme featuring implant-free, zero-silicon-loss, and faceted raised source/drain
- K. Cheng
- A. Khakifirooz
- et al.
- 2009
- VLSI Technology 2009
Low-k spacers for advanced low power CMOS devices with reduced parasitic capacitances
- Elbert Huang
- Eric Joseph
- et al.
- 2008
- IEEE International SOI Conference 2008
Gate length scaling and high drive currents enabled for high performance SOI technology using high-κ/metal gate
- K. Henson
- H. Bu
- et al.
- 2008
- IEDM 2008
High-performance high-κ/metal gates for 45nm CMOS and beyond with gate-first processing
- M. Chudzik
- B. Doris
- et al.
- 2007
- VLSI Technology 2007