A compact 6 GHz to 12 GHz digital PLL with coupled dual-LC tank DCO
- A. Goel
- Alexander V. Rylyakov
- et al.
- 2010
- VLSI Circuits 2010
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101 results for Herschel Ainspan
A uniform bandwidth PLL using a continuously tunable single-input dual-path LC VCO for 5Gb/s PCI express Gen2 application
- Woogeun Rhee
- Herschel Ainspan
- et al.
- 2007
- A-SSCC 2007
An ultra compact differentially tuned 6 GHz CMOS LC VCO with dynamic common-mode feedback
- Babak Soltanian
- Herschel Ainspan
- et al.
- 2006
- CICC 2006
Experimental analysis of the effect of substrate noise on PLL performance
- Keith A. Jenkins
- Woogeun Rhee
- et al.
- 2006
- SiRF 2006
Characteristics of submicron MOS varactors
- Keith A. Jenkins
- Herschel Ainspan
- 2006
- SiRF 2006
A 10-Gb/s CMOS clock and data recovery circuit using a secondary delay-locked loop
- Woogeun Rhee
- Herschel Ainspan
- et al.
- 2003
- CICC 2003
A direct-conversion receiver IC for WCDMA mobile systems
- Scott K. Reynolds
- Brian A. Floyd
- et al.
- 2003
- IEEE Journal of Solid-State Circuits
Development of 5.8GHz SiGe BiCMOS direct conversion receivers
- Sudipto Chakraborty
- Scott K. Reynolds
- et al.
- 2003
- IMS 2003
Architectural trade-offs for SiGe BiCMOS direct conversion receiver front-ends for IEEE802.11a
- Sudipto Chakraborty
- Scott K. Reynolds
- et al.
- 2002
- GaAs IC 2002
A direct-conversion receiver IC for WCDMA mobile systems
- S.K. Reynolds
- B. Floyd
- et al.
- 2002
- BCTM 2002