A 30Gb/s 1:4 demultiplexer in 0.12μm CMOS

Abstract

A 1:4 demultiplexer, implemented in 0.12μm SOI and bulk CMOS technology, operates with a BER below 10-13 at 30Gb/s (SOI) and 26Gb/s (bulk) input data rates (27-1 PRBS), drawing 200mA from a 2V supply. At 1.2V, the chips draw 100mA and operates at input data rates of 21Gb/s (SOI) and 18Gb/s (bulk). The design has an active area of 300μm × 90μm.