A 34&181;m2DRAM cell fabricated with a 1&181;m single-level polycide FET technology
- Hu H. Chao
- Robert H. Dermard
- et al.
- 1981
- ISSCC 1981
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15 results for H.H. Chao
Control store implementation of a high performance VLSI CISC
- J.H. Chang
- H.H. Chao
- et al.
- 1987
- MICRO Annual Workshop 1987
TESTABILITY DESIGN FOR MICRO/370, A SYSTEM/370 SINGLE-CHIP MICROPROCESSOR.
- F.Warren Shih
- H.H. Chao
- et al.
- 1985
- IEEE ITC 1985
SPECIAL FUNCTION UNIT FOR THE MICRO/370 MICROPROCESSOR.
- C.A. Trempel
- R.W. Hadsell
- et al.
- 1985
- ICCD 1985
CLOCK GENERATOR WITH FINITE STATE MACHINE OPTIMIZATION.
- Shauchi Ong
- M.Y. Tsai
- et al.
- 1985
- ICCD 1985
DESIGN OPTIMIZATION FOR CONTROL CIRCUITS IMPLEMENTED WITH PLAS.
- H.H. Chao
- Shauchi Ong
- et al.
- 1985
- ICCD 1985
ON THE SYNCHRONIZATION OF A MICROPROCESSOR.
- H.H. Chao
- Shauchi Ong
- et al.
- 1985
- CICC 1985
One-Micron Polycide (WSI2 on Poly-Si) MOSFET Technology
- M.Y. Tsai
- H.H. Chao
- et al.
- 2019
- JES
A 20-ns 128-Kbit X 4 High-Speed DRAM with 330-Mbit/s Data Rate
- Nicky C.C. Lu
- Hu H. Chao
- et al.
- 1988
- IEEE Journal of Solid-State Circuits
Designing the Micro / 370
- H.H. Chao
- Shauchi Ong
- et al.
- 1987
- IEEE Design and Test of Computers