DESIGN OPTIMIZATION FOR CONTROL CIRCUITS IMPLEMENTED WITH PLAS.

Abstract

A global optimization scheme for control circuit design using programmable logic array (PLA) implementation is presented. The control circuit is optimized with respect to performance, power, and area, as well as design effort through interactive logic, circuit, and layout designs. The optimization scheme has been successfully applied in the design of the execution unit control and the bus controller of a 32-bit microprocessor. The tradeoffs of various design approaches are discussed.