Conference paper
A room temperature 0.1 μm CMOS on SOI
G. Shahidi, C. Blair, et al.
VLSI Technology 1993
Paper
TP-A1 Shallow-Level Electron Traps in SiO2
Abstract
No abstract available.
Related
T.H. Ning, C.M. Osburn, et al.
Journal of Applied Physics
D.S. Wen, C.C.-H. Hsu, et al.
IEDM 1989
Conference paper
Design and technology challenges for sub-0.5 μm CMOS and bipolar
T.H. Ning
VLSI-TSA 1989