Silicon-Rich SiO2 and Thermal SiO2 Dual Dielectric for Yield Improvement and High Capacitance

Abstract

The use of silicon-rich SiO2 and thermal SiO2 dual dielectric in memory capacitors and FET's is investigated. It is shown that the silicon-rich layer was conductive and introduced only a small decrease in the series capacitance of the dual dielectric. Consequently, the capacitance of the dual dielectric is close to that of the thermal oxide only, The response time of the silicon-rich layer is measured by using FET response time and is shown to be in the nanosecond range. With this fast response time, it is possible to use the dual dielectric in memory and logic circuits. Another advantage of the dual dielectric is the very high yield due to the field screening of the silicon-rich layer to any nonuniformities in the thermal oxide or at the SiO2-contact interface This dual dielectric has the promise of high yield and high capacitance for future VLSI circuits. Copyright © 1983 by The Institute of Electrical and Electronics Engineers, Inc.