Physical limits to VLSI technology using silicon MOSFET's

Abstract

Limits to miniaturization of silicon MOSFET's for digital VLSI applications are examined. A channel length of about 0.1 μm is very difficult to accomplish due to statistical doping fluctuations, the onset of tunneling in the required thin gate insulator, and resistivity of the shallow source/drain regions. Operation at low voltages is required to limit power dissipation and control punchthrough, but is constrained by the built-in junction potential and other small potential terms which become more important in small devices. © 1983.