Publication
IEEE Journal of Solid-State Circuits
Paper

On the Leverage of High-fT Transistors for Advanced High-Speed Bipolar Circuits

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Abstract

This brief presents a detailed study on the leverage of high-fT transistors for advanced high-speed bipolar circuit applications. It is shown that for the standard ECL circuit, the leverage of high fT is limited by the passive resistors (emitterfollower resistor and collector load resistor) and wire delay, especially in the low-power regime. For the standard NTL circuit, the leverage is higher due to its front-end configuration and lower power supply value. As the passive resistors are decoupled from the delay path in various advanced circuits utilizing active-pull-down schemes, the leverage of high fTbecomes more significant. © 1992 IEEE

Date

01 Jan 1992

Publication

IEEE Journal of Solid-State Circuits

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