Magnetic Bubble Memory Exerciser

Abstract

A magnetic bubble domain memory exerciser using a microprocessor controller is described. The exerciser may be used as a stand-alone controller or connected to a host computer for data analysis. The use of the microprocessor makes the exerciser quite flexible so that it may easily be programmed to test chips with a large variety of architectures and capacities up to 512 × 512 bits. Furthermore the microprocessor controller relieves the operator from having to know the bubble memory operation in detail. Most memory parameters are stored in removable programmable read-only memories (PROM's) which allows quick changes of both the experiment being performed and the chip being tested. Operation is possible from dc to 1 MHz, and the drive coils and their electronics are designed so that good optical access is available even at the highest frequency. This makes it possible to do diagnostic testing by magneto-optic observation of the bubble domains. Diagnostic testing can also be done electronically, using the field interruption technique and the signal from the magnetoresistive sensors. In full memory operation, the tester provides several different modes of error checking, and error mapping and it has been successfully used for testing both Permalloy and ion-implanted type bubble devices. Copyright © 1980 by The Institute of Electrical and Electronics Engineers, Inc.