Low thermal budget antimony/phosphorus NMOS technology for CMOS

Abstract

A novel antimony-preamorphized phosphorus process (Sb/P) for NMOS source/drain formation is presented. It is demonstrated that very shallow (<or=0.15 mu m) phosphorus junctions with ideal diode characteristics and very low leakage current can be realized by using Sb pre-amorphization and RTA. The authors also fabricated 0.25 mu m effective channel length NMOS transistors with these shallow Sb/P diffusions and 7 nm gate oxide and obtained excellent device characteristics, e.g., Gm/sub (sat)/=236 mS/mm, S=79 mV/dec, and total source/drain series resistance of 420 Omega - mu m. These devices have short-channel effects, punch-through voltage, and channel hot carrier reliability comparable to those with conventional (furnace drive-in) arsenic diffusions. The more graded lateral profile of these Sb/P junctions also reduces the gate induced drain leakage by 10X compared with As devices. This low thermal-budget Sb/P process is therefore scalable and extendible to deep submicron bulk and 3-D CMOS ULSI.