Conference paper
Effect and model of gate oxide breakdown on CMOS inverters
R. Rodríguez, J.H. Stathis, et al.
INFOS 2003
Ultra-thin oxide reliability has become an important issue in integrated circuit scaling. Present reliability methodology stresses oxides with a low impedance voltage source. This, though, does not represent the stress under circuit configurations, in which transistors are driven by other transistors. A Current Limited Constant Voltage Stress simulates circuit stress well. Limiting the current during the breakdown event reduces the post-breakdown conduction. Limiting the current to a sufficiently low value may prevent device failure, altogether.
R. Rodríguez, J.H. Stathis, et al.
INFOS 2003
B. Yang, A. Waite, et al.
IEDM 2007
E. Cartier, J.H. Stathis, et al.
Applied Physics Letters
S. Lombarde, F. Palumbo, et al.
ICICDT 2004