Publication
VLSI Technology 2019
Conference paper

Gate-Cut-Last in RMG to Enable Gate Extension Scaling and Parasitic Capacitance Reduction

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Abstract

In this paper, we present for the first time a 'Gate-Cut-Last' integration scheme completed within the Replacement Metal Gate (RMG) module. This novel gate cut (CT) technique allows the scaling of gate extension length past the end fin which reduces parasitic capacitance, leakage and performance variation. In addition, we demonstrate that CT-in-RMG is a promising alternative integration process that can enable scaling for future logic technology nodes. Device, circuit and reliability results are shown to compare this novel CT-in-RMG process to the conventional gate cut method.

Date

01 Jun 2019

Publication

VLSI Technology 2019

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