Confined PCM-based Analog Synaptic Devices offering Low Resistance-drift and 1000 Programmable States for Deep Learning
- Wanki Kim
- Robert L. Bruce
- et al.
- 2019
- VLSI Technology 2019
Conference paper
Publications
9 results at VLSI Technology 2019
Gate-Cut-Last in RMG to Enable Gate Extension Scaling and Parasitic Capacitance Reduction
- A. Greene
- Huimei Zhou
- et al.
- 2019
- VLSI Technology 2019
Conference paperInference of Long-Short Term Memory networks at software-equivalent accuracy using 2.5M analog Phase Change Memory devices
- Hsinyu Tsai
- Stefano Ambrogio
- et al.
- 2019
- VLSI Technology 2019
Conference paperTechnology challenges and enablers to extend Cu metallization to beyond 7 nm node
- Takeshi Nogami
- H. Huang
- et al.
- 2019
- VLSI Technology 2019
Conference paperDirect Partition Measurement of Parasitic Resistance Components in Advanced Transistor Architectures
- Zuoguang Liu
- Heng Wu
- et al.
- 2019
- VLSI Technology 2019
Conference paperComprehensive Scaling Study on 3D Cross-Point PCM toward 1Znm Node for SCM Applications
- W. Chien
- H. Ho
- et al.
- 2019
- VLSI Technology 2019
Conference paperSiGe Channel CMOS: Understanding Dielectric Breakdown and Bias Temperature Instability Tradeoffs
- Richard G. Southwick
- Miaomiao Wang
- et al.
- 2019
- VLSI Technology 2019
Conference paperChannel Strain Dependence of Tinv in Strained Si and Sil-xGexFETs: Internal Strain-induced Modification of Chemical Oxidation
- Choonghyun Lee
- Shogo Mochizuki
- et al.
- 2019
- VLSI Technology 2019
Conference paperSelf-Allancd Gate Contact (SAGC) for CMOS technology scaling beyond 7nm
- Ruilong Xie
- Chanro Park
- et al.
- 2019
- VLSI Technology 2019
Conference paper