Surendra B. Anantharaman, Joachim Kohlbrecher, et al.
MRS Fall Meeting 2020
Among the challenges hindering the integration of carbon nanotube (CNT) transistors in digital technology are the lack of a scalable self-aligned gate and complementary n- and p-type devices. We report CNT transistors with self-aligned gates scaled down to 20 nm in the ideal gate-all-around geometry. Uniformity of the gate wrapping the nanotube channels is confirmed, and the process is shown not to damage the CNTs. Further, both n- and p-type transistors were realized by using the appropriate gate dielectric - HfO2 yielded n-type and Al2O3 yielded p-type - with quantum simulations used to explore the impact of important device parameters on performance. These discoveries not only provide a promising platform for further research into gate-all-around CNT devices but also demonstrate that scalable digital switches with realistic technological potential can be achieved with carbon nanotubes. © 2013 American Chemical Society.
Surendra B. Anantharaman, Joachim Kohlbrecher, et al.
MRS Fall Meeting 2020
A. Nagarajan, S. Mukherjee, et al.
Journal of Applied Mechanics, Transactions ASME
S. Cohen, T.O. Sedgwick, et al.
MRS Proceedings 1983
Julian J. Hsieh
Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films