IEEE Electron Device Letters

A Submicrometer High-Performance Bipolar Technology

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This letter describes a submicrometer self-aligned bipolar technology developed to minimize the device topography and to provide shallow profiles for high-performance ECL applications. The technology features 0.8-µm design rules, planar beakless field oxide, polysilicon-filled deep trench isolation, and the use of rapid thermal annealing (RTA). Conventional ECL circuits with 35-ps gate delays, a novel accoupled active-pull-down (APD) ECL circuit with 21-ps gate delay, and a 1/128 static frequency divider operated at a maximum clocking frequency of 12.5 GHz have been demonstrated using this technology. © 1989 IEEE