A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoCMonodeep KarJoel Silbermanet al.2024ISSCC 2024
IBM NorthPole: An Architecture for Neural Network Inference with a 12nm ChipAndrew S. CassidyJohn V. Arthuret al.2024ISSCC 2024
Architecture and Design Approaches to ML Hardware Acceleration: Performance Compute EnvironmentLeland Chang2024ISSCC 2024
Mixed-signal Dot-product Processor with Switched-Capacitors for Machine LearningKyu Hyoun KimMingu Kang2024ICEIC 2024
Devices, Circuits, and Architectures for Analog In-Memory Computing-Based Deep Neural Network Inference Hardware AccelerationIrem Boybat-Kara2024HiPEAC 2024
Analog Resistive Switching Devices for Training Deep Neural Networks with the Novel Tiki-Taka AlgorithmTommaso StecconiValeria Bragagliaet al.2024Nano Letters
Characterization of High-Power Superconducting Microwave ResonatorsDaniil FrolovAlexander Netepenkoet al.2024NRSM 2024
Exploring the benefits of using co-packaged optics in data center and AI supercomputer networks: A simulation-based analysis [Invited]Pavlos ManiotisDaniel M. Kuchta2024J. of Opt. Comm. and Netw.
A Chaos Recommendation Tool for Reliability Testing in Large-Scale Cloud-Native SystemsMudit VermaSandeep Hanset al.2024COMSNET 2024