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Micromachines
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A Review of Reliability in Gate-all-around Nanosheet Devices

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Abstract

Gall-around (GAA) Nanosheet field-effect-transistor (NS FET) is poised to supplant FinFET in 3nm CMOS technology node and beyond. Introduction of new device structure, coupled with aggressive pitch scaling, can give rise to distinct reliability challenges. In this article, we present a review of the key reliability mechanisms in GAA NS FET, including bias temperature instability (BTI), hot carrier injection (HCI), gate oxide time dependent dielectric breakdown (TDDB), and middle-of-line (MOL) TDDB. We aim to not only underscore the unique reliability attributes inherent to NS architecture but also provide a holistic view of the status and prospects of NS reliability, taking in to account the challenges posed by future scaling.

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Micromachines

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