65nm CMOS technology for low power applications
- A. Steegen
- R. Mo
- et al.
- 2005
- IEDM 2005
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5 results for T. Schiml
High performance and low power transistors integrated in 65nm bulk CMOS technology
- Z. Luo
- A. Steegen
- et al.
- 2004
- IEDM 2004
A 45nm low cost low power platform by using integrated dual-stress-liner technology
- J. Yuan
- S.S. Tan
- et al.
- 2006
- VLSI Technology 2006
Stress proximity technique for performance improvement with dual stress liner at 45nm technology and beyond
- X. Chen
- S. Fang
- et al.
- 2006
- VLSI Technology 2006
Modular 0.13 μm bulk CMOS technology for high performance and low power applications
- L.K. Han
- S. Biesemans
- et al.
- 2000
- VLSI Technology 2000