VLSI Technology 2000
Conference paper

Modular 0.13 μm bulk CMOS technology for high performance and low power applications


A leading-edge 0.13 μm generation CMOS technology is presented as a platform for systems on a chip (SOC) applications. A modular triple gate oxide process concept is introduced for the first time to allow the optimization of high performance devices, low leakage devices, and I/O devices independently. Process commonality is also achieved to support deep-trench based embedded DRAM. Seven levels of Cu interconnects integrated with low-k ILD have been developed. With mature KrF 248 nm lithography and optical enhancement techniques, aggressive design rules are achieved to meet the circuit density requirement. A 2.48 μm2 functional ST-SRAM cell is demonstrated.