Technical Digest-International Electron Devices Meeting

Opportunities and challenges in ultra low k dielectrics for interconnect applications

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The increasing levels of device integration and the drive towards system-on-a-chip approaches have created an insatiable demand for fine pitch and high performance silicon back end of the line (BEOL) interconnects. This paper discusses the challenges associated with producing, characterizing and integrating porous dielectrics into the BEOL interconnects and presents results from integration evaluations.