Low power passive equalizer optimization using tritonic step response

Abstract

A low power passive equalizer using RL terminator is proposed and optimized in this work. The equalizer includes an inductor in series with the resistive terminator, which boosts high frequency components and therefore improves the interconnect bandwidth with little overhead on power consumption. An analytic estimation method for eye-opening and jitter based on tritonic step response is also introduced in this work, which enables the optimization procedure. Our experimental results show that our estimation method is accurate and a board level transmission line of 50cm wire length can achieve 15Gb/s data rate. With 15GHz frequency input, the power consumption of the equalizer is less than 2.5mW, and the total power is 5mW. Copyright 2008 ACM.