Design considerations of scaled sub-0.1 μm PD/SOI CMOS circuits
C.T. Chuang, R.V. Joshi, et al.
ISQED 2003
This paper describes the effect of low-pressure collimated sputtering (LPCS) on deposition rates, step coverages, and electrical properties of Al-Cu. The LPCS deposition is achieved in a magnetron sputter deposition system with a hollow cathode and collimator. The deposition results show that as the via or line size reduces, a complete fill requires a monotonic increase in the aspect ratio of the collimator which limits the throughput for a thick deposition, especially at high pressures (>1 mT). The benefit of the LPCS is the improved deposition rate (scaled to power) of 1.5-2× compared to the conventional high-pressure collimated deposition. The integration of LPCS process to fabricate a two-level Al-Cu metal structure with submicron Al-Cu studs (aspect ratio of 2) shows excellent via and electromigration resistances.© 1995 American Institute of Physics.
C.T. Chuang, R.V. Joshi, et al.
ISQED 2003
R.V. Joshi, A. Pellela, et al.
VLSI Circuits 2002
R.V. Joshi, L. Hsu, et al.
VMIC 1991
R.V. Joshi, W. Hwang, et al.
IEEE International SOI Conference 1998