Guanyu Zhu, Christopher Chamberland, et al.
APS March Meeting 2020
Hardware-efficient transpilation of quantum circuits to a quantum device native gate set is essential for the execution of quantum algorithms on noisy quantum computers. Typical quantum devices utilize a gate set with a single two-qubit Clifford entangling gate per pair of coupled qubits; however, in some applications access to a non-Clifford two-qubit gate can result in more optimal circuit decompositions and also allows more flexibility in optimizing over noise. We demonstrate calibration of a low-error non-Clifford controlled-π/2 phase (CS) gate on a cloud-based IBM Quantum system using the Qiskit Pulse framework. To measure the gate error of the calibrated cs gate we perform non-Clifford cnot-dihedral interleaved randomized benchmarking. We are able to obtain a gate error of 5.9(7)×10^(−3) at a gate length 263 ns, which is close to the coherence limit of the associated qubits, and lower error than the back-end standard calibrated CNOT gate.
Guanyu Zhu, Christopher Chamberland, et al.
APS March Meeting 2020
Abhinav Kandala, Kristan Temme, et al.
APS March Meeting 2020
George Zettles, Scott Willenborg, et al.
ISSCC 2022
Shelly Garion, Hillel Kolodner, et al.
SYSTOR 2017