This article presents a compact computational model for the rapid determination of the junction temperature of a chip cooled with a heat sink, exploring the concept of hot water cooled electronics as a strategy to reduce the carbon footprint of data centers. The model aims at rapid simulations of variations of the chip, as well as the heat sink outlet water temperatures during transient heat loads. The model is validated by experimental tests with a water-cooled manifold microchannel (MMC) heat sink, which is designed to cool the processors of state-of-the-art servers. The chip temperature is determined subject to periodic heat loads as large as 100W with frequencies in the range from 1 to 10Hz. The results show that to calculate 1s of real temperature variation requires less than 20s of computational time on a Quad-Core AMD Opteron 2350, 2GHz desktop PC with 4GB RAM. The thermal response of the heat sink to real-time power traces with durations up to 200s is modeled for different flow rates. The simulations indicate that application of a flow-control feedback loop could achieve more than 50% reduction in water flow rate, without compromising the maximal chip temperatures. Copyright © Taylor & Francis Group, LLC.